КФУ. Карточка публикации. FPGA implementation of LTE turbo decoder using MAX-log MAP algorithm

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FPGA IMPLEMENTATION OF LTE TURBO DECODER USING MAX-LOG MAP ALGORITHM

Форма представления

Статьи в зарубежных журналах и сборниках

Год публикации

2017

Язык

английский

Авторы, сотрудники КФУ

Мосин Сергей Геннадьевич, автор

Библиографическое описание на языке оригинала

Belov V, Mosin S., FPGA implementation of LTE turbo decoder using MAX-log MAP algorithm//2017 6th Mediterranean Conference on Embedded Computing, MECO 2017 - Including ECYPS 2017, Proceedings. - 2017. - Vol., Is.. - Art. № 7977157.

Аннотация

Implementation of an efficient turbo decoder with low complexity, short delay and insignificant performance degradation is currently a quite challenging task. The paper presents an implementation of a 3GPP LTE turbo decoder. The design of the turbo decoder has been optimized to achieve efficient FPGA resource utilization. This design can be useful for applications, which is critical to resource utilizations, but do not need high throughput.

Ключевые слова

Turbo decoder; BCJR; MAP; MAX-log MAP; LTE turbo decoder; FPGA implementation

Название журнала

2017 6th Mediterranean Conference on Embedded Computing, MECO 2017 - Including ECYPS 2017, Proceedings

URL

https://www.scopus.com/inward/record.uri?eid=2-s2.0-85027076676&doi=10.1109%2fMECO.2017.7977157&partnerID=40&md5=354770324bf4c348859b14cb04929959

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https://repository.kpfu.ru/?p_id=165137

Полная запись метаданных

Поле DC	Значение	Язык
dc.contributor.author	Мосин Сергей Геннадьевич	ru_RU
dc.date.accessioned	2017-01-01T00:00:00Z	ru_RU
dc.date.available	2017-01-01T00:00:00Z	ru_RU
dc.date.issued	2017	ru_RU
dc.identifier.citation	Belov V, Mosin S., FPGA implementation of LTE turbo decoder using MAX-log MAP algorithm//2017 6th Mediterranean Conference on Embedded Computing, MECO 2017 - Including ECYPS 2017, Proceedings. - 2017. - Vol., Is.. - Art. № 7977157.	ru_RU
dc.identifier.uri	https://repository.kpfu.ru/?p_id=165137	ru_RU
dc.description.abstract	2017 6th Mediterranean Conference on Embedded Computing, MECO 2017 - Including ECYPS 2017, Proceedings	ru_RU
dc.description.abstract	Implementation of an efficient turbo decoder with low complexity, short delay and insignificant performance degradation is currently a quite challenging task. The paper presents an implementation of a 3GPP LTE turbo decoder. The design of the turbo decoder has been optimized to achieve efficient FPGA resource utilization. This design can be useful for applications, which is critical to resource utilizations, but do not need high throughput.	ru_RU
dc.language.iso	ru	ru_RU
dc.subject		ru_RU
dc.title	FPGA implementation of LTE turbo decoder using MAX-log MAP algorithm	ru_RU
dc.type	Статьи в зарубежных журналах и сборниках	ru_RU